1. Field of the Invention
This invention relates generally to semiconductors, and more specifically, to a semiconductor structure with different lattice constant materials and method for forming the same.
2. Related Art
Strained silicon (SS) technology has been known to increase channel carrier mobility by 30-60% compared to bulk silicon. Currently, thick graded and buffer layers of SiGe on the order of 3.5 xcexcm are used for SS devices in order to produce relaxed SiGe on a Si wafer with low threading dislocation (TD) density. A thin strained Si layer epitaxially grown on the relaxed SiGe provides for the high carrier mobility in strained channel devices. TD density imposes threats to SS device performance, for example, including problems of shorting, undesired leakage current, etc.
To address the problem of threading dislocations in SS technology, prior techniques have included the inserting of SiGeC layers into a channel region of a semiconductor structure. Inserting the SiGeC layers strangles the TDs at a SiGeC/SiGe interface, wherein the TDs move along the interface instead of propagating vertically. Prior techniques have also included inserting Si layers in SiGe, as well as, inserting oxide layers in SiGe, both in an attempt to form a TD isolation structure. However, improvement upon such prior techniques is still needed.
Moreover, strained channel devices are desirable since enhanced charge carrier mobility in strained semiconductors results in improved device performance. Strained channel devices, however, are difficult to fabricate due to the unavailability of substrates of preferred materials (e.g., SiGe) on which to deposit a strained layer (e.g., Si). Numerous techniques have been proposed to fabricate xe2x80x9cvirtual substratesxe2x80x9d of SiGe on conventional Si substrates, including, for example, the use of ramped Ge concentration and CMP of deposited layers. However, the later techniques use the wafer edge to terminate defects, which is problematic for defects near the wafer center. This issue will be worse for larger diameter substrates.
Accordingly, an improved semiconductor structure and method of making the same is desired.
According to one embodiment of the present disclosure, a semiconductor structure includes a substrate comprising a first relaxed semiconductor material with a first lattice constant. A semiconductor device layer overlies the substrate, wherein the semiconductor device layer includes a second relaxed semiconductor material with a second lattice constant different from the first lattice constant. Lastly, a dielectric layer is interposed between the substrate and the semiconductor device layer, wherein the dielectric layer includes a programmed transition zone disposed within the dielectric layer for transitioning between the first lattice constant and the second lattice constant. The programmed transition zone includes a plurality of layers, adjoining ones of the plurality of layers having different lattice constants with one of the adjoining ones having a first thickness exceeding a first critical thickness required to form defects and another of the adjoining ones having a second thickness not exceeding a second critical thickness. Each adjoining layer of the plurality of layers forms an interface for promoting defects in the transition zone to migrate to and terminate on an edge of the programmed transition zone. A method of making the semiconductor structure is also disclosed.